Recommended Articles

Recommended Articles – May 2020

Regressions can be an important resource consumer. Daniel Ciupitu, from AMIQ Consulting, provides a recipe for optimizing the disk usage when running regressions: How To Optimize Disk Space When Running Regressions Elihai Maicas, from Intel, talks about RAL classes and how they affect performance. He offers a tip on how to deal with that. Read […]

Daniel Ciupitu

How To Optimize Disk Space When Running Regressions

Regressions can take a lot of space on the disk. If neglected, a single regression can occupy more than 100GB of space. When a project has multiple users that forget to clean up old regressions you can reach terabytes of useless data pretty fast. This article gives some hints on how to mitigate this issue. […]

Recommended Articles

Recommended Articles – April 2020

Out of this DVCon presentation Tudor got inspired and extended the solution of adding constraints into their own objects. Take a look at his new UVM journey: Favor Composition Over Inheritance – Even for Constraints Elihai Maicas, from Intel, started a series of verification tips. Here is one of them on how to turn assertions […]

Recommended Articles

Recommended Articles – March 2020

In the CNN using HLS post my colleague, Sergiu Duda, provides the long awaited code for the How to Implement a Convolutional Neural Network Using High Level Synthesis article. HLS using C synthesis has brought FPGA implementation of computational intensive tasks into mainstream. Hardware for Deep Learning: Know Your Options article proposes a new solution, […]

Sergiu Duda

CNN using HLS

I am pleased to announce the release of the code for the article “How to Implement a Convolutional Neural Network Using High-Level Synthesis”. Synopsis The previous article discussed three main aspects: The used approach to implement a Convolutional Neural Network (CNN) The elements that I took into account when choosing the neural network architecture The […]

Recommended Articles

Recommended Articles – February 2020

After a long pause, Tudor Timisescu wrote a new post about compilation time of SystemVerilog code and how it is impacted by the code aggregation in SystemVerilog packages. Under certain conditions, changing a single file might result in recompilation of the whole code. Find out why in Bigger Is Not Always Better: Builds Are Faster […]