Recommended Articles

Recommended Articles – July 2020

Neil Johnson announced he will take a step back and pass the leadership of SVUnit project to Tudor Timisescu, aka Verification Gentleman. SVUnit is a consistent and valuable contribution to the verification community and I am happy it is not lost. That’s the OpenSource spirit at work! Welcome back Manish! After four years of silence, […]

Recommended Articles

Recommended Articles – June 2020

SystemVerilog Multidimensional Arrays is a juicy topic for a blog post given they are feature reach. Here is a post that explains some of the features: SystemVerilog Multidimensional Arrays A long-awaited feature comes into existence: adjusting verification environment behavior based on collected coverage items in real time at run time. Specman team facilitates this operation […]

Recommended Articles

Recommended Articles – May 2020

Regressions can be an important resource consumer. Daniel Ciupitu, from AMIQ Consulting, provides a recipe for optimizing the disk usage when running regressions: How To Optimize Disk Space When Running Regressions Elihai Maicas, from Intel, talks about RAL classes and how they affect performance. He offers a tip on how to deal with that. Read […]

Recommended Articles

Recommended Articles – April 2020

Out of this DVCon presentation Tudor got inspired and extended the solution of adding constraints into their own objects. Take a look at his new UVM journey: Favor Composition Over Inheritance – Even for Constraints Elihai Maicas, from Intel, started a series of verification tips. Here is one of them on how to turn assertions […]

Recommended Articles

Recommended Articles – March 2020

In the CNN using HLS post my colleague, Sergiu Duda, provides the long awaited code for the How to Implement a Convolutional Neural Network Using High Level Synthesis article. HLS using C synthesis has brought FPGA implementation of computational intensive tasks into mainstream. Hardware for Deep Learning: Know Your Options article proposes a new solution, […]

Recommended Articles

Recommended Articles – February 2020

After a long pause, Tudor Timisescu wrote a new post about compilation time of SystemVerilog code and how it is impacted by the code aggregation in SystemVerilog packages. Under certain conditions, changing a single file might result in recompilation of the whole code. Find out why in Bigger Is Not Always Better: Builds Are Faster […]