Recommended Articles

Recommended Articles – September 2020

Did you know that you can match strings using regular expressions from within SystemVerilog code? UVM implements a function called uvm_re_match. My colleague, Florin Oancea, explains how to use it and what you should pay attention at: How to Match Strings in SystemVerilog Using Regular Expressions In the August edition of the recommended articles I […]

Recommended Articles

Recommended Articles – August 2020

Ioana Cristea from Amiq shows how to achieve a non blocking communication between the SystemVerilog simulator and an external component, like Python: Non-Blocking Socket Communication in SystemVerilog Using DPI-C. Neil Johnson and Dave Rich have launched a challenge to the verification community. Discover and fix race conditions inside 10 SystemVerilog code snippets. Read more in […]

Recommended Articles

Recommended Articles – July 2020

Neil Johnson announced he will take a step back and pass the leadership of SVUnit project to Tudor Timisescu, aka Verification Gentleman. SVUnit is a consistent and valuable contribution to the verification community and I am happy it is not lost. That’s the OpenSource spirit at work! Welcome back Manish! After four years of silence, […]

Recommended Articles

Recommended Articles – June 2020

SystemVerilog Multidimensional Arrays is a juicy topic for a blog post given they are feature reach. Here is a post that explains some of the features: SystemVerilog Multidimensional Arrays A long-awaited feature comes into existence: adjusting verification environment behavior based on collected coverage items in real time at run time. Specman team facilitates this operation […]

Recommended Articles

Recommended Articles – May 2020

Regressions can be an important resource consumer. Daniel Ciupitu, from AMIQ Consulting, provides a recipe for optimizing the disk usage when running regressions: How To Optimize Disk Space When Running Regressions Elihai Maicas, from Intel, talks about RAL classes and how they affect performance. He offers a tip on how to deal with that. Read […]

Recommended Articles

Recommended Articles – April 2020

Out of this DVCon presentation Tudor got inspired and extended the solution of adding constraints into their own objects. Take a look at his new UVM journey: Favor Composition Over Inheritance – Even for Constraints Elihai Maicas, from Intel, started a series of verification tips. Here is one of them on how to turn assertions […]