- Stefan Birman
- Verification Engineer
Highlights of DVCon US 2017
- March 13th, 2017
- 1 Comment
DVCon US (Feb 27-Mar 2 2017, San Jose, California) has come to an end after another content-rich edition. Some of the highlights of the technical program AMIQ consultants enjoyed attending are provided below. Hot Topics The main highlight of the conference by far was the emerging Portable Stimulus Standard (PSS), which was presented through a […]
- Ionuț Ciocîrlan
- Verification Engineer
Highlights of DVCon Europe 2016
- November 21st, 2016
- No Comments
The third edition of DVCon Europe (October 19-20, 2016, Munich) has just come to an end. The technical content of the conference was diverse, but three primary areas of interest could be identified: portable stimulus, formal verification, and automotive. While the first two are already common themes in conference programs, the automotive field has recently […]
- Accellera , Conference , DVCon , Highlights , Papers , Tutorials , YAMM
- Ionuț Ciocîrlan
- Verification Engineer
Highlights of DVCon US 2016
- April 7th, 2016
- No Comments
DVCon US (Feb. 29th – Mar 3rd, 2016, San Jose, California) has concluded another successful edition. There were a lot of interesting tutorials, panels and technical sessions, with SV/UVM still being a major focus. There was also a clear emphasis on portable stimuli and the associated standard developed by Accellera’s Portable Stimuli Working Group (PSWG), […]
- Accellera , Conference , DVCon , portable stimulus , SVAUnit , SystemVerilog , Tutorials , UVM
- Stefan Birman
- Verification Engineer
DVCon Europe 2015 Highlights
- November 30th, 2015
- No Comments
Time flies! It’s already 2 weeks since DVCon Europe 2015, long enough for the experience to distill into highlights. AMIQ was involved on multiple levels: sponsoring, exhibiting, contributing a tutorial and last, but not least, AMIQ engineers attending technical presentations. Here are some of the highlights, my highlights. Tutorial Track Accellera&Co. was quite a strong […]
- Aurelian Ionel Munteanu
- Verification Engineer
Recommended Articles – November 2014
- December 12th, 2014
- No Comments
Tudor recommends us to take advantage of the e-language features to define similar vr_ad registers instead of using copy/paste: VerificationGentleman: Experimental Cures for Flattened Register Definitions in vr_ad Then he shows us how to implement side effects of read/write operations using vr_ad’s indirect_access() method: VerificationGentleman: Using indirect_access(…) in vr_ad The same Gentleman tutors us on […]
- Stefan Birman
- Verification Engineer
A Birds-Eye View of DVCon Europe
- November 26th, 2014
- 5 Comments
I finally found some time to write about the first edition of DVCon-Europe, which took place on 14-15th of October, 2014, in Munich. The content What I liked most at DVCon Europe was conference’s focus on content that addressed interesting and often intriguing technical topics. Below you can find the summary for a few presentations […]
- DVCon , Octave , SystemC , SystemVerilog , verification
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