Recommended Articles

Recommended Articles – March 2019

Cristian Bob (AMIQ) leveraged the power of Python into a SystemVerilog testbench using a client-server architecture. The post How to Connect SystemVerilog with Python is a must-read if you use or plan to use Python along with SystemVerilog. It is natural to see Python infiltrating the verification world given it’s popularity (see TIOBE index) and […]

Cristian Bob

How to Connect SystemVerilog with Python

Verification of a digital design often requires an interaction between several language domains (SystemVerilog and C, SystemVerilog and Python, SystemVerilog and e-language, etc.). This article shows you how to set up a connection between SystemVerilog and Python. SystemVerilog is not able to communicate directly with Python. Instead, the SV code first needs to talk to […]

Recommended Articles

Recommended Articles – February 2019

It looks like February is a short month and probably people were focused more on preparing for the DvCon US 2019 conference. Let’s meet again in March with new and interesting technical content from our domain. In AMIQ Resources page you can find the contents of AMIQ’s bookshelf, papers and the list of blogs we […]

Recommended Articles

Recommended Articles – January 2019

New entry on our list. Recently, I found a new source of interesting papers related to UVM and Verification. It is the Rochester Institute of Technology (RIT) Scholar Works. RIT is a tech University from New-York, USA. Of particular interest are the theses papers published on their website. Here are some papers which tackle various […]

Aurelian Ionel Munteanu

How to Call C-functions from SystemVerilog Using DPI-C

Recently I played a bit with SystemVerilog and DPI-C and I thought of sharing the experience with you. This post shows data types mappings from SystemVerilog to C and how to call C-functions from SV. I also provide a simple SV/C application to facilitate understanding of data types mappings. Data Mappings When SystemVerilog interacts with […]

Recommended Articles

Recommended Articles – December 2018

Sergiu Duda from AMIQ has put a lot of effort into creating a high quality article on the non-trivial topics of High Level Synthesis and Deep Learning. The later, is not found in the everyday terminology of a verification engineer. Deep learning is just a flavour of a bigger part called Machine Learning which in […]