- Aurelian Ionel Munteanu
- Verification Engineer
Recommended Articles – February 2023
- February 23rd, 2023
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Handling threads in SystemVerilog is always a challenge, especially when reset triggers. How to Decouple Threads in SystemVerilog is showing one way of decoupling a thread (task) from its originator/starter and survive the reset of its originator’s clock domain. The background here applies to DUTs which are part of more than one clock domains, thus […]
- Aurelian Ionel Munteanu
- Verification Engineer
Recommended Articles – January 2023
- January 30th, 2023
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SystemVerilog/UVM code reuse is reaching the next level. Andrei Vintilă and Sergiu Duda have developed a framework/architecture called Externally Controlled Testbench (aka ECTB), initially presented at DVCon Europe 2022 under the name How creativity kills reuse – A modern take on UVM/SV TB architectures. Now, as promised, the authors have published the User Guide on […]
- Andrei Vintilă, Sergiu Duda
- Verification Engineers
AMIQ’s Externally Controlled Testbench Architecture
- January 30th, 2023
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This article is a follow-up on the paper presented at DVCon EU 2022 entitled How creativity kills reuse – A modern take on UVM/SV TB architectures. As promised at the presentation, albeit with some delay, we have uploaded on GitHub the library that implements the presented architecture together with an usage example. The proposed architecture […]
- DVCon , ECTB , GitHub , methodology , Papers , utility library , UVM
- Aurelian Ionel Munteanu
- Verification Engineer
Recommended Articles – December 2022
- December 22nd, 2022
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AMIQ is a constant presence at DVCon Europe conference (both AMIQ Consulting and AMIQ EDA). If you haven’t been able to attend the conference or you’ve missed one presentation which was of interest for you, go ahead and read the highlights from our perspective. The highlights article is a joined effort of my colleagues and […]
- Stefan Birman
- Verification Engineer
Highlights of DVCon EU 2022
- December 13th, 2022
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This post presents some of the highlights we jotted down the paper while attending DVCon Europe 2022 (6-7 December, Munich). This was the first face-to-face edition after the pandemics and it showed: you could feel the energy, you could feel that people were happy to meet in person again. Table of Contents Tutorials Papers Acknowledgements […]
- Aurelian Ionel Munteanu
- Verification Engineer
Recommended Articles – September 2022
- September 28th, 2022
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Cristian / CFSVision has enhanced the standard UVM messaging with a new `uvm_infos macro that accepts multiple message tags. `uvm_infos enhances the fine tuning of message streams, which in turn increases the debug focus while shortening the debug time. Our industry relies on commercial EDA tool chains to get from idea to physical implementation. The […]
Recommended Articles - February 2023© 2003-2023 AMIQ Consulting - ALL Rights Reserved. Privacy Policy.