This article is a summary of the paper “Machine Learning Techniques for Improving the Performance Metrics of Functional Verification” that was published in the 24th volume of the Romanian Journal of Information Science and Technology.
What is Intelligent Verification
One of today’s most sought-after results in functional verification is to efficiently reduce the engineering effort during the pre-silicon phase of most complex SoC products. I believe that the solution which guarantees such a result is Intelligent Verification, a family of techniques that leverage the power of Machine Learning algorithms for optimizing key processes of functional verification. Concretely, I have noticed that the research community pinpointed a significant reduction of the verification time cost when using such an approach.
Intelligent Verification Strategies
The functional verification phase includes many steps that need to be covered. Depending on which process requires optimization, there are four general strategies that can be used:
- Intelligent Requirements Extraction
- Automated Coverage Feedback
- Automated Bug Detection
- Intelligent Proving
Intelligent Requirements Extraction
When interpreting the requirements specification, I see that the typical approach requires a manual extraction process that is susceptible to accidental error insertions. To avoid this, we can draw out semantic information by using a learning algorithm that automates this step.
My investigation uncovers a tradeoff between documentation limitations and the quality of semantic extraction.
Automated Coverage Feedback
For complex SoC products, we see that the typical regression sessions can take several weeks or even months to complete. In many cases, this inconvenience is due to a high redundancy rate of the driven scenarios. I think that this weak point can be efficiently alleviated by reducing stimuli redundancy using automated coverage feedback. The strategy I outline in the article is the usage of intelligent algorithms which learn to map the stimuli packets to their associated coverage results.
Automated Bug Detection
In functional verification, I think that “bug hunting” is usually the most tedious task since this process has different outcomes from one project to another. This makes the investigation resources difficult to estimate. A strong desire is to reduce the total time spent on identifying corner-case bugs with as little engineering effort as possible. I personally think that this result can be achieved by using a learning engine which tries to model the changes introduced when implementing new features.
In formal verification, the task of proving the correctness of a system’s function across the entire input space can become infeasible with today’s typical tools and frameworks. As a formal verification engineer, I found myself doing tweaks during the proving process which lasts several weeks for complex systems. I found out that this can be alleviated by using optimization algorithms which can learn to reduce the total processing time.
There are several Intelligent Verification trends out there which are still in their incipient forms. Year by year, the learning techniques become more and more sophisticated and the cloud-computing power continues to improve. I think that this is a great prospect for future research on Intelligent Verification solutions which can reduce the product time-to-market.