Did you ever had the need to programmatically dump the values of signals from a simulation? SystemVerilog offers such a dumping capability by means of system tasks. The signal values are dumped into a vcd (value change dump) file. The vcd files can later be read by a waveform viewer and examine signals’ behavior. Read about those tasks in here.
Yoav Hollander, the inventor of e-language, announced on his Foretellix Blog, that a new verification language has just emerged. It is called M-SDL, the autonomous vehicles verification language. M-SDL stands for Measurable Scenario Description Language. It is intended to be an open language and aims to make Autonomous Vehicles safer and more reliable. Read more in here.
UVM and PSS are not competing but they are complementing each other. Tom Fitzpatrick shows some concrete examples on how this is achieved. Read more in Portable stimulus and UVM.