Tudor (Verification Gentleman) continues his series of articles on unit testing with a case study on Testing SVA Properties and Sequences.
Ben Cohen (SystemVerilog.us) goes into details on how tasks and threads are used inside System Verilog Assertions. The Understanding the SVA Engine + Simple alternate solutions article also includes an SVA example that is easier to write using tasks.
Dan Gisselquist (Gisselquist Technology) shows How to Debug a DSP algorithm by using Octave. Amiq has also been using Octave inside UVM test-benches to offload the work on complex mathematical computations.