The third edition of DVCon Europe (October 19-20, 2016, Munich) has just come to an end.
The technical content of the conference was diverse, but three primary areas of interest could be identified: portable stimulus, formal verification, and automotive.
While the first two are already common themes in conference programs, the automotive field has recently begun to gain momentum together with autonomous technologies and advanced driver assistance systems (ADAS) in cars.
AMIQ was involved on multiple levels: sponsoring, exhibiting, contributing a paper, and, last but not least, attending technical presentations.
Some of the highlights of the technical presentations attended and enjoyed by the AMIQ team are presented below.
Design and Verification Focus in ARM TSG – Hobson Bullman, ARM Ltd.
The opening keynote was delivered by Hobson Bullman, General Manager of ARM’s Technology Services Group (TSG).
In his talk, he described the role of the TSG within ARM as maintaining and improving the infrastructure and methodology used in the design process.
An interesting detail was the hiring of data scientists to analyze different projects at ARM and provide insights into how to improve performance and quality.
He also talked about their use of formal techniques in order to shift-left in verification and the challenges of recruiting formal engineers.
A future objective is to increase the use of ARM-based servers in their engineering process.
The Road Ahead for the Securely Connected, Self-Driving Car – Juergen Weyer, NXP Semiconductors
Day two of the conference started with the keynote by Juergen Weyer, Vice President of Automotive Sales for EMEA at NXP Semiconductors.
His talk outlined the design trends and technologies he considers critical to enable securely connected and self-driving cars:
– sensors the size of postage stamps to replace today’s bulky, power-hungry hardware for radar-based ADAS
– components that interpret the data from these new sensors and then direct the car’s behavior
– Faster in-car communication technologies (Gigabit Ethernet) to handle the high volume of data coming from onboard sensors
– Vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) technologies that support secure data exchange between vehicles and roadside infrastructure.
Security in the Automotive Value Chain
The automotive theme of Juergen Weyer’s keynote was continued with a panel discussion on the topic of security awareness in the design process for automotive components.
The discussions ranged from the security of end-products (e.g. in-car communication technologies) to that of the manufacturing process (e.g. handling of security keys).
T4 Formal Verification – Too Good To Miss – Jason Sprott, Jonathan Bromley, Verilab Ltd.
A very honest and lively presentation on the benefits, drawbacks, and use cases of formal verification.
This paper describes what you need to do, and how to do it, throughout the entire lifecycle of a formal verification project based on an example block-level design.
One of the conclusions of the tutorial, and one with which I agree, is that formal verification should be used as a complement to simulation, not a replacement.
T3 How Portable Stimulus Addresses Key Verification, Test Reuse, and Portability Challenges – Larry Melling, Cadence Design Systems, Inc.; Staffan Berg, Mentor Graphics Corp; Adnan Hamid, Breker Verification Systems, Inc.; Adiel Khan, Synopsys, Inc.; Karthick Gururaj, Vayavya Labs Pvt., Ltd.
T10 Model Driven Approach to Software Driven Verification – Sharon Rosenberg, Larry Melling, Cadence Design Systems Inc.
Both these tutorials provided a comprehensive and in-depth description of the Portable Stimulus Standard (PSS).
Despite its name, the audience learned that PSS is less about a portable stimulus and more about a portable model of the design that can be used to create stimulus. A PSS model is used to specify the intent, not the means.
These tutorials not only provided the under-the-hood details and advantages of PSS, but also usage examples and intended tool support.
T11 Shadow Simulation: A New Verification Methodology for Configurable Logic – Amit Gupta, Chandra Mulpuri, Xilinx Inc.
As the title suggests, the authors of this paper propose a verification methodology for FPGAs in order to overcome the issues generated by a traditional verification flow.
The paper discusses these issues, e.g. long runtimes, memory requirements and debuggability, all of which usually stem from the large design size, while also providing several possible verification solutions, e.g. isolating the faulted module, software emulation of the FPGA configuration memory, removing unused logic.
T16 Designing Safe Cars – How to Ensure Your Semiconductor Design Meets ISO-26262 Fault-Safety Requirements – Amir Rahat, Jamil Mazzawi, Optima Design Automation
This tutorial explained why safety in autonomous cars is currently a hot topic for most companies, while providing details of how it is measured and what the safety-related targets are for self-driving cars.
These targets are measured in FITs (Failures in Time), where one FIT equals one failure per billion (109) hours (i.e. once in around 114,155 years).
The authors also talked about the different types of naturally occurring faults and how these can be corrected.
The tutorial concluded with a presentation of an in-house EDA solution that speeds up error injection simulations and helps meet ISO-26262 requirements.
5.1 1,2,3,…8 Simple Steps Towards a Single Digital Signal Processing Testbench Supporting Heterogeneous Interfaces and Datatypes – Nico Lugil, Keysight Technologies
This paper presents the benefits and challenges of moving to UVM SystemVerilog from the perspective of digital signal processing (DSP) module verification.
The author developed an interesting architecture with support for multiple, differently parameterized interfaces of the same kind and similar scalability for sending different kinds of data types over these interfaces.
The goal was a common testbench code that could be adapted to verify the different DSP modules in question.
9.2 Yet Another Memory Manager (YAMM) – Andrei Vintila, Ionuţ Tolea, AMIQ Consulting
My colleagues presented an implementation of a memory manager (MM) component suitable for functional verification environments. Besides usage and API information, the paper contains impressive benchmark results in comparison with UVM MAM, the UVM library memory manager. More details can be found here.
5.2 Go Figure – UVM Config – The Good, The Bad, The Debug – Dirk Hansen, Rich Edelman, Mentor Graphics Corp.
This was a presentation on the UVM 1.1d Config Database implementation that tried to clarify how to do debug. Their solution implies modifying the UVM code to include debug messages.
This resulted in a lively discussion, as part of the audience agreed with this technique, while others considered it intrusive, arguing that it should be the simulator that provides these debug methods.
Lightning talks – a new concept
This year DVCon Europe introduced the concept of lightning talks instead of poster sessions. Lightning talks are fast sessions with around 15 minutes allotted to each presentation, including questions. In my opinion, most presentations needed a bigger time slot to fully cover their material.
An interesting session was 1L.2 Slicing Through the UVM’s Red Tape: a frustrated user’s survival guide, by Jonathan Bromley, Verilab, Inc.
This talk addressed the challenges and frustrations faced by novice and intermediate-level users when applying UVM to real projects.
It looked at classic challenges, such as the handling of the sequence stack, proper use of the configuration database, and parameterized design under test (DUT), and tried to provide solutions in keeping with the UVM guidelines.
The Best Paper Award, sponsored by AMIQ, went to Rafal A. Baranowski and Marco Trunzer of Robert Bosch GmbH for the paper 6.3 Complete Formal Verification of a Family of Automotive DSPs.
The conference once again set the bar high in terms of technical program diversity, premium content, and networking opportunities.
Let me know your thoughts on the conference in the comments section below.