Stefan Birman

Functional Coverage Patterns: The Counter

This post explains the functional verification of counters and it is part of a series of posts exploring functional coverage patterns. The first post in the series was Functional Coverage Patterns: Bitwise Coverage. Table of contents What is a Counter? Counter Verification Regarding Synchronicity Reset Value Coverage Clear Value Coverage Overflow and Underflow Policy Coverage […]

Stefan Birman

How To Graphically Represent DUT’s Data Flows

In this post I will explain how to analyse the DUT’s data flows and represent them graphically in an intuitive way. I use data flow analysis to create meaningful diagrams to be included in the verification specifications(e.g. see How To Read a Specification, section Read the spec with a meaningful goal). You won’t need more […]

Stefan Birman

How to Check Out-Of-Order Transactions

This article presents a general solution to the classic problem of checking out-of-order transactions. The main goal is to present the solution as a verification pattern that can be easily grasped and adapted to your verification project requirements (e.g. verification language, reference implementation language, design under test – DUT specifics etc.). The article’s sections are: […]

Stefan Birman

Functional Coverage Patterns: Bitwise Coverage

As you probably already know, all digital design circuits either process or transfer data, which is usually represented as a bit vector of size N. Data values that pass through the system provide an indication of how system’s functionality is exercised, so you need to add them to the functional coverage goals. You might ask […]