We are creative, dynamic, and friendly professionals with extensive experience in hardware design and verification. Everything we do and create is the result of being passionate about bringing sharp ideas to life and putting the emphasis on quality. We are dedicated to serving customers worldwide and contributing to their success through our two business lines: verification consulting services and design and verification software tool development.
Since the company inception in 2003, we have helped customers overcome resource and time constraints and accomplish their hardware verification goals.

Functional Verification Planning and Management

Our team of consultants can develop and deploy in-house verification flows, from standard methodology customization through infrastructure implementation down to post-deployment tracking.

Functional Verification Implementation

We provide ASIC and FPGA functional verification services spanning the entire verification flow from module to system level. Our consultants are proficient in the e language and SystemVerilog, as well as in methodologies like eRM, UVM, OVM, VMM.

Verification IP (VIP) Development

We have experience in developing VIP on demand for any protocol or function, using the e language, SystemVerilog, or SystemC.


Our most experienced consultants enjoy providing on-site or off-site training classes for all major hardware verification languages and methodologies.

Other Services

Our expertise also covers VIP qualification, formal verification, and SystemC modeling.
We pioneered the integrated development environments (IDEs) in hardware design and verification. Since 2008, when we spun off of AMIQ Consulting, we have focused on providing software tools that help engineers increase the speed and quality of code development, simplify maintenance, improve testbench reliability, and implement best coding practices.

DVT Eclipse IDE

Design and Verification Tools (DVT) is the first integrated development environment (IDE) for the e language, SystemVerilog, Verilog, and VHDL. DVT is built on the Eclipse Platform and is similar to well-known programming tools like Visual Studio and IntelliJ. Read more...

Verissimo SystemVerilog Testbench Linter

Verissimo is a static code analysis tool that allows engineers accurately identify SystemVerilog improper language, semantics, and styling usage, as well as verification methodology violations. Read more...

Specador Documentation Generator

Specador is a tool that automatically generates accurate HTML documentation from source code comments. It works in batch mode and uses dedicated language parsers for e, SystemVerilog, Verilog, and VHDL. The tool enables design and verification engineers to effortlessly generate and maintain well-organized documentation. Read more...